18.A processor has a 32KB L1 cache with 64-byte lines. A program accesses a 2D array of 1024×1024 integers (4 bytes each) in column-major order. Assuming the cache is initially empty, approximately how many cache misses occur in the first complete column access? (A) 1024 (B) 4096 (C) 16384 (D) 65536 (E) 1048576