申論題

4. Compare the single-cycle implementation, in which all instructions take 1 clock cycle, with the five-stage (IF, ID, EX, MEM, WB) pipelined implementation using the following eight instructions: load word (Iw), store word (sw), subtract (sub), and (and), or (or), set-less-than (slt) and branch-on-equal (beq). The operation times for the major functional units are 2 ns for memory access, 2 ns for ALU operation, and 1 ns for register file read or write.

4.3 Consider a program consisting of 100 1w instructions and in which each instruction is
dependent upon the instruction before it. What would the actual CPI be if the program were run on the single-cycle implementation and the pipelined implementation with a forwarding unit and a hazard
detection unit? Please copy Table 4-2 to your answer sheet and fill in the blanks with your answers.