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107年 - 107 國立中山大學_碩士班招生考試_電機系(己組):計算機結構#110036
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題組內容
5.[25%] Cache memory
(b) [2%] Explain how a hierarchical memory system takes advantage of localities.
其他申論題
(a) [5%] Explain the functions of the five pipeline stages of the pipelined MIPS CPU, respectively.
#471353
(b) [6%] Use examples to explain the three types of hazards of the pipelined MIPS CPU, respectively.
#471354
(c)[9%] Explain in detail how we can solve the three types of hazards of the pipelined MIPS CPU based on the architecture shown in Figure 2, respectively.
#471355
(a) [4%] Explain what two localities of memory data are and give examples, respectively.
#471356
(c)[4%] What are the advantages and disadvantages of SRAMs and DRAMs, respectively? How are they used in a hierarchical memory system, respectively?
#471358
(d) [15%] For a cache with 4 blocks, complete the cache access results for a direct mapped cache, a 2-way set associative cache and a fully associative cache, respectively, shown in the three tables shown below. Please draw these three tables in your answer papers and fill in your answers. Note that in this problem the least recently used block replacement policy is assumed. 請特別注意!請將第三頁表一、表二、 表三的內容繪製在答案卷中並填入答案才允予 計分。填寫在題目卷上將不予計分。
#471359
簡答題 一、解釋名詞:拒收水準(LTPD, Lot Tolerance Percentage Defect):
#471360
二、請說明「全數檢驗」時之條件與「抽樣檢驗」之優缺點。
#471361
三、抽樣檢驗中,何謂允收數?何謂拒收數?請簡答之。
#471362
四、某食品工廠生產果汁飲料其規格為 50±10 mL,今因客戶要求必須對此飲料品管加強管 制,並且須要用 X-R 管制圖來管制此產品,經收集 100 個樣本數據如表所示,試繪製 X-R 管制圖。
#471363