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107年 - 107 國立中山大學_碩士班招生考試_電機系(己組)：計算機結構#110036
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題組內容
1.[15%] Complete the calculations of the following two numbers, X=134.0625, Y=-18
(b) [5%] Add X and Y, and represent the result using IBEE 754 single precision format
其他申論題
5. For DRAM operation, assume that we need a minimum of 105 electrons for the MOS storage capacitor. The capacitor has an area of 0.6 μmx 0.6 um on the wafer, an oxide thickness of 7 nm, and is fully charged to 3 V. What is the required minimum depth of a rectangular-trench capacitor?
#471342
(a) positive photoresist and negative photoresist (5%)
#471343
(b) evaporation and sputtering (5%)
#471344
(a) [5%] Represent X and Y using IEEE 754 single precision format, respectively
#471345
(c)5%] Multiply X and Y, and represent the result using IEEE 754 single precision format
#471347
2.[20%] Translate the following C code to the minimum MIPS assembly instructions At the beginning of this code segment, the only values in registers are the base address of arrays A and B in registers $a1 and $a2. Assume that the values of i is stored in the register $s0
#471348
(a) [5%] Explain in detail how the architecture shown in Figure 1 is used to execute an I-type instruction (e.g., addi $s3, $s3, 1) step-by-step.
#471349
(b) [5%] Explain in detail how the architecture shown in Figure 1 is used to execute a jump instruction (e.g., j Ll) step-by-step.
#471350
(c) [5%] Describe in detail how this architecture is used to execute a load instruction (e.g., Iw $t0, 32($s3) ) step-by-step.
#471351
(d) [5%] Explain in detail how the architecture shown in Figure 1 is used to execute a branch instruction (e.g., beq $t0, $s5, Exit) step-by-step.
#471352
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