(d) Explain the base width modulation and state its consequences. (5%)

(d) Determine the position of the Fermi level with respect to the intrinsic Fermi level.

(a) Calculate the maximum electric field at the collector-base junction. (5%)

b) Calculate the collector-base depletion capacitance per unit area. (5%)

(c) Calculate the depletion layer width in base. (5%)

4. Answer the following questions about MOS capacitor. (a) Explain the flat-band voltage. (5%)( b) Consider a n+polysilicon-SiO2-Si capacitor with a p-type silicon substrate doped to NA = cm, a silicon dioxide insulator with a thickness of 300 . The metal-semiconductor work function diference is -0.98 V. The fixed charge within the SiO2-Si interface Q/q = 4✖The dielectric constant of SiO2 is 3.9. Calculate the flat-band voltage. (15%)

5. For DRAM operation, assume that we need a minimum of 105 electrons for the MOS storage capacitor. The capacitor has an area of 0.6 μmx 0.6 um on the wafer, an oxide thickness of 7 nm, and is fully charged to 3 V. What is the required minimum depth of a rectangular-trench capacitor?

(a) positive photoresist and negative photoresist (5%)

(b) evaporation and sputtering (5%)

(a) [5%] Represent X and Y using IEEE 754 single precision format, respectively

(b) [5%] Add X and Y, and represent the result using IBEE 754 single precision format